1. Field of the Invention
This invention relates to integrated circuit structures. More particularly, this invention relates to one or more low dielectric constant insulation layers formed on an integrated circuit structure and a method of making same.
2. Description of the Related Art
In the formation of integrated circuit structures, patterned conductive layers are commonly used to provide electrical interconnection between various functional devices comprising the integrated circuit structure. A continuing desire to reduce the size of features in such integrated circuit structures includes reducing the horizontal spacing between adjacent conductors on the same plane. A reduction of feature size, however, often results in a corresponding rise in the capacitance of the conductors, as well as raising a problem of crosstalk between the conductors. An increase in capacitance of the lines in the integrated circuit structure can result in degradation of the performance of the integrated circuit structure by reducing the response time of the active devices, as well as by increasing the impedance of the lines.
It would, therefore, be desirable if one could reduce the amount of capacitance between adjacent lines, either horizontally or vertically, to thereby reduce the impedance of the lines. Theoretically, this could be done by substituting a different insulation material having a lower dielectric constant, for example, using some insulation material other than the commonly used SiO.sub.2, or by somehow reducing the dielectric constant of the particular insulation material being used, for example, somehow reducing the dielectric constant of a SiO.sub.2 insulation layer.